Low power displays are essential system components of most mobile electronic devices. The display subsystem is often one of the largest consumers of battery power as well as one of the most expensive components in many of these devices. The display industry has made continuous progress improving the visual performance, power consumption and cost through device and system architecture innovations. However, there is a class of important applications that require additional significant improvements in power and cost to become technically feasible and financially viable.
The dominant display technology for mobile devices, computer monitors and flat panel TVs is currently amorphous silicon hydrogenated thin film transistor (a-Si:H TFT) liquid crystal, also known generally as active matrix LCD technology. Advanced manufacturing technologies support a highly efficient worldwide production engine with capacity in the tens of millions of square meters of flat panel displays per year. The most common system architecture today consists of a simple array of TFT pixels on a glass panel that are driven by off-glass driver ICs. Each row and column of the TFT pixel array requires a driver pin in the conventional off-glass driver arrangement. Thousands of high voltage driver pins are needed even for relatively modest display resolutions. For a large display modules (e.g. as found in a 37″ diagonal LCD TV) the cost of the driver ICs as a percentage of the overall display module cost is relatively low (e.g. 10%). For small displays, however, which increasingly require high resolution fine pitch pixels, the cost of driver ICs dominates the TFT module cost.
It has long been a goal of the flat panel industry to integrate the drive electronics onto the flat panel substrate using native TFT transistors to replace some or all of the functions conventionally handled in off-glass driver ICs. One significant barrier to integrating driver circuits is the poor performance of the a-Si:H TFT devices. Compared to single-grain silicon CMOS technology a-Si TFTs have very low electrical mobility which limits the speed and drive capability of the transistors on the glass. Additionally, the a-Si TFT transistors can accumulate large threshold voltage shifts and subthreshold slope degradations over time and can only meet product lifetime requirements by imposing strict constraints on the on-off duty cycle and bias voltages of the transistors. “Electrical Instability of Hydrogenated Amorphous Silicon Thin-Film Transistors for Active-Matrix Liquid-Crystal Displays” and “Effect of Temperature and Illumination on the Instability of a-Si:H Thin-Film Transistors under AC Gate Bias Stress” give a good overview of the gate bias stress induced threshold shifts and subthreshold slope degradations seen in a-Si:H TFTs.
Any integrated a-Si driver scheme has to address the threshold shift due to bias stress that is seen when positive and negative gate voltages are applied to the TFT devices. Because the positive and negative stress accumulation processes are due to fundamentally different device physics phenomena, they have very different accumulation rates and sensitivities to gate drive waveforms. To first order within the range of driving waveforms seen in typical flat panel refresh circuitry, positive stress is not strongly dependent on the frequency content of the gate waveform and accumulates relatively rapidly as a function of the integrated “on” time the gate sees. As positive stress increases, the voltage threshold of the TFT device is typically increased. TFT circuits typically have a maximum allowable positive stress beyond which the threshold shifts become too large for proper function.
Negative stress, in contrast, is very frequency dependent, accumulating more slowly at higher frequencies and typically manifests as both a negative threshold shift and a subthreshold slope degradation. To accumulate significant negative stress, the gate of a typical a-Si TFT needs an unbroken stretch of negative gate voltage (e.g. 20 ms or more for typical a-Si:H TFT devices). In conventionally scanned TFT flat panel displays, the gate voltage is positive only for a very small time (e.g. one line time, about 15 us every 16.600 ms frame; about 0.1% duty cycle) and negative for the rest of the frame period (e.g. 16.585 ms or about 99.9% of the frame period). The positive and negative gate voltage levels for such a conventional a-Si panel are typically chosen to balance the positive and negative stress effects to achieve a long operating life (e.g. >100 k hours at 70° C.). Each stress component (positive and negative) taken on its own typically results in a much shorter operational life (e.g. as short as 10 k hours); only the fine tuned balance of positive and negative stress achieves the desired operating lifetime. Developing integrated column and row drivers for a-Si TFT technology is therefore very problematic as the stress impact of duty cycle, voltage and frequency content of all the internal signals must be considered individually. As a result, only the simplest logic structures (e.g. shift registers) with low duty cycles and large threshold shift margins have been implemented in a-Si.
Another integration constraint for a-Si:H TFTs is the lack of a complementary device (e.g. a P-type FET) in conventional a-Si processes which is necessary for more complex logic functions and higher integration.
Despite these limitations, integrated drivers have been fabricated using a-Si technology with limited success. “Reliable Integrated a-Si Select Line Driver for 2.2-in. QVGA TFT-LCD” describes a display with integrated select (row) line drivers; while functional the reported lifetime is only 20,000 hrs (about 2.3 yrs) with a threshold shift of 15V, indicating that a substantial design voltage margin (i.e. 15V) is required which increases system power and driver IC voltage range significantly. Additional work reported in “High-Resolution Integrated a-Si Row Driver Circuits”, “Reliable Integrated a-Si Select Line Driver for 2.2-in. QVGA TFT-LCD”, and “Design of integrated Drivers with Amorphous Silicon TFTs for Small Displays. Basic Concepts” indicates some progress with integrated a-Si TFT row scanning circuits at high voltages and low duty cycles but substantial integration of both row and column drivers in a-Si with reasonable device lifetime has not been achieved to date. The display drive techniques and circuits described herein address this need for higher integration of driver functions using on-glass TFT devices while substantially reducing the deleterious effects of bias stress.
To overcome the a-Si device limitations, low temperature polysilicon (LTPS) processing has been developed to provide transistors with higher mobilities and much better stability under stress conditions that can successfully integrate driver IC functions onto the flat panel substrate. However, the additional processing steps (e.g. laser rapid thermal annealing), expensive equipment (e.g. for finer lithography) and increased mask count (approximately twice the mask count of an a-Si:H TFT process) raise the cost of an LTPS substrate significantly above an a-Si:H TFT substrate. Hence LTPS usage is generally considered economical only in high resolution small screen applications where the higher cost is outweighed by the integration savings and feature benefits (e.g. increased brightness, reduced form factor, higher dot pitch).
Even with improved devices such as LTPS and driver integration, the power consumption of LCDs is often too high for a significant class of applications that require a constantly active display. This class of displays is primarily used in a reflective mode to conserve power although operation with device-generated lighting (e.g. backlight or sidelight) is often a product requirement. Numerous applications such as a mobile phone's secondary or outer display, general public signage, numerous consumer devices (e.g. MP3 players, alarm clocks, etc.), electronic books, retail electronic shelf labels, etc. often require displays that show relatively static information but remain visible for the majority of the time the device is used. For devices whose primary utility is based on the display of information (e.g. mobile email, e-books, marketing messages) such utility is enhanced by display technologies that allow longer active display times between recharges. The displays described herein are also directed to such applications.